I explained it poorly. The chip has an ADC that can operate in window mode. I. E. when my output voltage jitters high or low out of bound, I can use logic to very quickly effectively increase or decrease my duty cycle. (Actually substitute another pwm signal that is in pnase but with a larger or smaller duty)
5V square PWM from the ATtiny goes to a gate driver capable of several amps at 5V, that gate driver switches a pair of logic level MOSFETs, one of the MOSFETs switching the coil and the other acting as the recitfier. Topology is a synchronus inverting buckboost.
Changing the duty cycle then raises or lowers the voltage.
At the same time, via interrupt or event channel, the cpu starts calculating a new duty cycle and setting the timers. Interrupts may take 100 cycles. Whereas, pwm at 625kHz will have completed an additional three cycles before I can even start to modify the duty from the program.
None of this may matter. Static dumb resistive load, I could probably just about run my MOSFETs off a 555 and not even worry about feedback or regulation.
However, the idea is interesting to me. Quick response regulation with more precise regulation happening as the CPU catches up.
Seems like it would give you a flatter output.
I've found when I discover an interesting electronic or programming technique or problem, that usually means I don't know the name. It's usually something figured out decades ago and there are references and papers that explain it and consider angles that I didn't know about.
I wasn't planning on variable frequency, you were speaking to the influence of frequency on voltage output earlier. I just meant that I could vary the frequency without messing up synchronization of the waves. I.E. I can produce two square waves of arbitrary duty and frequency up to 625kHz. The higher the frequency, the less resolution I have, however.
Anyhow, the output will be filtered with at least some fat caps. My load is a static resistance (heating element). I could probably drive this thing with a 555.
As far as I know, the Atmega328, at least, can't use the ADC to bypass the CPU and directly set the timer registers. The ADC can throw an interrupt and then the CPU sets the timer. When your pwm frequency is sub 100kHz, there is plenty of time to change the duty.
I don't know that I will need to vary the duty with logic. It's just an idea I had that seemed neat. Quick coarse adjustment and then a fine tuned adjustment.
I'm teaching myself about SMPS, and I'm curious. While the final circuit will have utility. I'm really learning how to use a scope, the newer AVRs, and switch mode power.
Everything has switch mode in it now, my vehicles, my arc welder, every chunk of electroincs pretty much. It's treated like a black box, buy the chip, follow the data sheet. However, if you want to build or fix one from first principles, good luck. Most approachable reference I've found is the DC/DC Book of Knowledge by Steve Roberts. And even it assumes that you'll mostly be using an ASIC.
Generally, I come up with an idea in electornics or programming that is novel to me, somebody else figured it out decades ago. That's why I'm wondering what you call the minumum pwm resolution and whatever this fast dumb logic adjustment to duty is.